Video compression with parallel processing

Driven by the rapidly increasing demand for audio-visual applications, digital video compression technology has become a mature field, offering several available products based on both hardware and software implementations. Taking advantage of spatial, temporal, and statistical redundancies in video data, a video compression system aims to maximize the compression ratio while maintaining a high picture quality. Despite the tremendous progress in this area, video compression remains a challenging research problem due to its computational requirements and also because of the need for higher picture quality at lower data rates. Designing efficient coding algorithms continues to be a prolific area of research. For circumvent the computational requirement, researchers has resorted to parallel processing with a variety of approaches using dedicated parallel VLSI architectures as well as software on general-purpose available multiprocessor systems. Despite the availability of fast single processors, parallel processing helps to explore advanced algorithms and to build more sophisticated systems. This paper presents an overview of the recent research in video compression using parallel processing. The paper provides a discussion of the basic compression techniques, existing video coding standards, and various parallelization approaches. Since video compression is multi-step in nature using various algorithms, parallel processing can be exploited at an individual algorithm or at a complete system level. The paper covers a broad spectrum of such approaches, outlining the basic philosophy of each approach and providing examples. We contrast these approaches when possible, highlight their pros and cons, and suggest future research www.elsevier.com/locate/parco Parallel Computing 28 (2002) 1039–1078 This work was supported by Research Grants Council of Hong Kong under grants HKUST6030/97E, HKUST 6228/99E, and HKTIIT98/99.EG02. Corresponding author. Address: Department of Computer Science and Engineering, The University of Texas at Arlington, P.O. Box 19015, 416 Yates St., 248 D/E Nedderman Hall, Arlington, TX 76019-0015, USA. E-mail address: [email protected] (I. Ahmad). 0167-8191/02/$ see front matter 2002 Published by Elsevier Science B.V. PII: S0167-8191 (02 )00100-X directions. While the emphasis of this paper is on software-based methods, a significant discussion of hardware and VLSI is also included. 2002 Published by Elsevier Science B.V.